v1.2
PRECISION ARRAYS / THE AMICUBE V1.2 PROJECT
Classic computing.
Reimagined in hardware.
A Spartan-6 FPGA, two independent SDRAM channels and a physical 68000 interface. Meet the 170 mm motherboard at the heart of AmiCube.
02 / HARDWARE EXPLORER
Explore the current native KiCad board, turn it over, or separate the connector and component groups to reveal the PCB beneath.
Interactive 3D is unavailable. Explore the native renders and assembly drawings below.
View assembly guide ↓The board Current native components, connectors and silkscreen.
Exploded view Separate component groups to see the board beneath.
Both faces Inspect the underside, pads and printed markings.
03 / THE ARCHITECTURE
Follow the design from programmable logic and memory to picture, sound and the connections around the board.
The Spartan-6 FPGA connects to two independent SDRAM channels, a translated 68000 socket and the AT91SAM7S256 controller.
FOLLOW THE DESIGN
The Spartan-6 FPGA connects to two independent SDRAM channels and the physical MC68000 socket, with an ARM controller handling configuration.
FPGA cores and firmware determine the behaviour of the system.
Explore a functional view of the design, then return to the native model to see the components themselves.
BENEATH THE COMPONENTS
Signal routing, power and ground share a defined eight-layer stack. In1.Cu and In4.Cu provide the main internal ground references, with dedicated routing and supply layers between them.
04 / THE BOARD DESIGN
A physical CPU interface and programmable logic share one motherboard. Follow the design from the 68000 bus to the connections that make it a complete system.
V1.2 / NATIVE BOARDPHYSICAL 68000 · PROGRAMMABLE LOGIC
A 64-pin MC68000 socket connects to the Spartan-6 through dedicated level translation. All 60 signal pins have their own FPGA connection, bringing the physical processor into the programmable design.
170 MM / EIGHT LAYERSMINI-ITX FOOTPRINT · CLASSIC CONNECTIONS
Dual floppy headers, PS/2, DB9 controllers and serial sit alongside HDMI, USB and Ethernet. An ATX supply connection and front-panel header bring the board into a complete system.
Each SDRAM has its own 16-bit data bus, address, commands and clock. The two channels share power and ground.
Explore all 18 connector groups in the port map, then turn the native model to see their physical positions.
Explore every connection ↗Current v1.2 development hardware. The interactive model follows the saved PCB; its exploded view separates component groups for inspection. Core integration, timing and physical qualification remain in progress.
05 / THE ASSEMBLY BOOK
Start with top assembly, then turn the board over and explore its stackup, routing and power guides.
Open the 5-page board guide ↗06 / WHERE WE ARE
The routed native design includes two independent SDRAM channels and the complete translated 68000 bus. The model comes directly from the latest saved KiCad PCB.
Source revision 4bb9cf2 · native geometry throughout.Top and bottom assembly, layer stackup, routing, power and buses. The current board-guide checks report clear ERC, DRC, connectivity and schematic parity.
Engineering checks document the design snapshot.Core integration for the independent memory channels, timing and signal integrity, Ethernet software and prototype qualification.
Hardware and firmware validation continue together.